Built In Test For Vlsi

Author: Paul H. Bardell
Editor: Wiley-Interscience
ISBN:
File Size: 52,49 MB
Format: PDF
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This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, written by professionals in several disciplines, has treated notation and mathematics in ways that vary from source to source. This book opens with a clear description of the shortcomings of conventional testing as applied to complex digital circuits, revewing by comparison the principles of design for testability of more advanced digital technology. Offers in-depth discussions of test sequence generation and response data compression, including pseudorandom sequence generators; the mathematics of shift-register sequences and their potential for built-in testing. Also details random and memory testing and the problems of assessing the efficiency of such tests, and the limitations and practical concerns of built-in testing.
A Designer’s Guide to Built-In Self-Test
Language: en
Pages: 320
Authors: Charles E. Stroud
Categories: Technology & Engineering
Type: BOOK - Published: 2006-04-11 - Publisher: Springer Science & Business Media

A recent technological advance is the art of designing circuits to test themselves, referred to as a Built-In Self-Test. This book is written from a designer's perspective and describes the major BIST approaches that have been proposed and implemented, along with their advantages and limitations.
IDDQ Testing of VLSI Circuits
Language: en
Pages: 124
Authors: Ravi K. Gulati, Charles F. Hawkins
Categories: Computers
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

Power supply current monitoring to detect CMOS IC defects during production testing quietly laid down its roots in the mid-1970s. Both Sandia Labs and RCA in the United States and Philips Labs in the Netherlands practiced this procedure on their CMOS ICs. At that time, this practice stemmed simply from
Economics of Electronic Design, Manufacture and Test
Language: en
Pages: 192
Authors: M. Abadir, T. Ambler
Categories: Technology & Engineering
Type: BOOK - Published: 2013-06-29 - Publisher: Springer Science & Business Media

The general understanding of design is that it should lead to a manufacturable product. Neither the design nor the process of manufacturing is perfect. As a result, the product will be faulty, will require testing and fixing. Where does economics enter this scenario? Consider the cost of testing and fixing
Testability Concepts for Digital ICs
Language: en
Pages: 212
Authors: F.P.M. Beenker, R.G. Bennetts, A.P. Thijssen
Categories: Technology & Engineering
Type: BOOK - Published: 2012-12-06 - Publisher: Springer Science & Business Media

Preface Testing Integrated Circuits for manufacturing defects includes four basic disciplines. First of all an understanding of the origin and behaviour of defects. Secondly, knowledge of IC design and IC design styles. Thirdly, knowledge of how to create a test program for an IC which is targeted on detecting these
Design and Test Technology for Dependable Systems-on-chip
Language: en
Pages: 550
Authors: Raimund Ubar, Jaan Raik, Heinrich Theodor Vierhaus
Categories: Computers
Type: BOOK - Published: 2011-01-01 - Publisher: IGI Global

"This book covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC)"--